Various electronic packaging structures are known in the art including, for example, those shown and described in U.S. Pat. No. 4,849,856 (Funari et al), U.S. Pat. No. 4,914,551 (Anschel et al), U.S. Pat. No. 4,962,416 (Jones et al) and U.S. Pat. No. 4,965,700 (McBride). Such packaging structures, as defined in these patents, typically utilize at least one thin film, flexible circuitized substrate as part thereof. Typically, such circuitized substrates include a thin dielectric (e.g., polyimide) layer having at least one circuit layer (e.g., chrome-copper-chrome) thereon. Such thin film, flexible circuitized substrates may be positioned on and electrically coupled to another circuitized substrate (e.g., printed circuit board) to thereby electrically couple a semiconductor device (chip) which is connected to respective portions of the thin film, circuitized substrate's circuitry to corresponding circuitry on the additional substrate. The aforementioned U.S. Pat. Nos. 4,849,856, 4,914,551 and 4,962,416 are representative examples of such packaging structures which utilize this means of connection.
Thin film, flexible circuitized substrates as produced today possess several distinct advantages (e.g., high density, flexibility, relative ease of manufacture, etc.) desired in the information handling systems field.
Another type of packaging structure known in the art includes those structures which utilize a ceramic or the like substrate which may include various levels of circuitization therein/thereon as part thereof, in addition to a plurality of connecting pins (e.g., copper) projecting from a bottom surface thereof such that this structure may be positioned within a female, receiving electrical circuitized member such as a printed circuit board or the like. Examples of such packaging structures which include a ceramic base or substrate member as part thereof are described in U.S. Pat. No. 4,072,697 (Spaight), U.S. Pat. No. 4,221,047 (Narken), U.S. Pat. No. 4,626,960 (Hamano et al), U.S. Pat. No. 4,652,977 (Jones) and U.S. Pat. No. 4,322,778 (Barbour et al). As shown in these patents, the various conductive pins typically project from an under side of the ceramic base or substrate for eventual coupling to such an associated circuit member. In more enhanced versions of these ceramic substrate packaging structures, the opposing upper surface of the ceramic includes a circuitized portion of various conductive (e.g., chrome-copper-chrome) layers, each located on a suitable dielectric (e.g., polyimide) layer. In some more recent examples, a total of two circuit layers may be utilized.
As will be understood from the following description, the present invention combines the several advantageous features of thin film, flexible circuitized packaging structures with those of the earlier, more ruggedized packaging structures which utilize a ceramic or the like substrate having appended pins as part thereof. The result is a significant expansion in the functional capabilities of such earlier packaging structures while simultaneously expanding the uses for thin film, flexible circuitized substrates of the type defined herein.
It is believed that an electronic packaging structure possessing the above advantageous features and others readily discernible from the teachings herein would constitute a significant advancement in the art.